Overview
The “Generator unbalance” element protects the machine from rotor damage due to excessive negative-sequence current. The element has an inverse time stage that is typically used for tripping and a definite time stage typically used for alarm purposes.
For more detailed information on “Generator unbalance” element, refer to GE, Universal Relay (UR) family of products, Version 8.0x manuals.
To see other supported elements, click here.
Setting Parameters
Modbus memory map for Setting parameters
| Products | Hex address | Register name | Range | Units | Step | Format | Default |
| G30, G60 | 4191 | Generator Unbalance Function | 0 to 1 | — | 1 | F102 | 0 (Disabled) |
| " | 4192 | Generator Unbalance Source | 0 to 5 | — | 1 | F167 | 0 (SRC 1) |
| " | 4193 | Generator Unbalance Inom (rated full load current of the machine) | 0 to 1.25 | pu | 0.001 | F001 | 800 |
| " | 4194 | Generator Unbalance Stage 1 Pickup | 0 to 100 | % | 0.01 | F001 | 800 |
| " | 4195 | Generator Unbalance Stage 1 K value | 0 to 100 | — | 0.01 | F001 | 100 |
| " | 4196 | Generator Unbalance Stage 1 Tmin | 0 to 50 | s | 0.001 | F001 | 250 |
| " | 4197 | Generator Unbalance Stage 1 Tmax | 0 to 1000 | s | 0.1 | F001 | 6000 |
| " | 4198 | Generator Unbalance Stage 1 K Reset | 0 to 1000 | s | 0.1 | F001 | 2400 |
| " | 4199 | Generator Unbalance Stage 2 Pickup | 0 to 100 | % | 0.01 | F001 | 300 |
| " | 419A | Generator Unbalance Stage 2 Pickup Delay | 0 to 1000 | s | 0.1 | F001 | 50 |
| " | 419B | Generator Unbalance Block | 0 to 4294967295 | — | 1 | F300 | 0 |
| " | 419D | Generator Unbalance Target | 0 to 2 | — | 1 | F109 | 0 (Self-reset) |
| " | 419E | Generator Unbalance Events | 0 to 1 | — | 1 | F102 | 0 (Disabled) |
| " | 419F | Reserved (3 items) | 0 to 65535 | — | 1 | F001 | 0 |
| F102 | 0 = Disabled, 1 = Enabled | ||||||
| F109 | 0 = Self-reset, 1 = Latched, 2 = Disabled | ||||||
| F167 | 0 = SRC 1, 1 = SRC 2, 2 = SRC 3, 3 = SRC 4, 4 = SRC 5, 5 = SRC 6 | ||||||
Logics & highlights
Generator unbalance inverse time curves
Generator unbalance logic
