Overview
MiCOM P92x voltage and frequency management relays provide an integrated solution for the secure and efficient operations of power systems.
Models available: MiCOM P921, MiCOM P922, MiCOM P923, MiCOM P925
For more detailed information on “MiCOM P92x” relays, refer to Schneider protection relays manuals.
To see other supported devices, click here.
Setting Parameters
General Setting Parameters
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
0100 | Remote settings | Address | 1 to 255 | 1 | – | F1 | 1 |
0101 | Reserved | – | – | – | – | – | |
0102 | Password characters 1 and 2 | 32 -127 | 1 | – | F10 | AA | |
0103 | Password characters 3 and 4 | 32 -127 | 1 | – | F10 | AA | |
0104 | Frequency | 50-60 | 10 | Hz | F1 | 50 | |
0105 to 108 | Reserved | ||||||
0109 | Default display | 1 – 8 | 1 | F26 | 1 | ||
010A | User reference (characters 1 and 2) | 32-127 | 1 | F10 | AL | ||
010B | User reference (characters 3 and 4) | 32-127 | 1 | F10 | ST | ||
010C | Fault number to be displayed (P922 & P923 only) | 1-25 | 1 | F31 | 25 | ||
010D | Configuration of the validation edge of the logic inputs | 0 | F12 | 0 | |||
010E | Reserved | ||||||
010F | Type of input voltage Of the logic inputs | 0-1 | 1 | F50 | 0 | ||
110 | CB supervision (P922-P923 ) only |
CB operations number | 1 | F1 | |||
0111 | CB operating time | 1 | 1/100 sec | F1 | |||
0112 – 0117 | Reserved | ||||||
0118 | CB closing time | 1 | 1/100 sec | F1 | |||
0119 to 011E | Reserved | ||||||
011F | Latched relays | F14 | |||||
120 | Ratios | Phase VT: primary value | A: 10 to 100000 B: 22 to 48 |
1 | 10 V | F51 | A: 2000 B: 22 |
0122 | Phase VT: secondary value | A: 570 to 1300 B: 2200 to 4800 |
1 | V/10 | F1 | A: 1000 B: 2200 |
|
0123 | Residual VT: primary value | A: 10 to 100000 B: 22 to 48 |
1 | 10 V | F51 | A: 2000 B: 22 |
|
0125 | Residual VT: secondary value | A: 570 to 1300 B: 2200 to 4800 |
1 | V/10 | F1 | A: 1000 B: 2200 |
|
0126 | Configuration | Connection | 0 to 3 | 1 | F52 | 0 | |
0127 | Protection | 0 to 1 | 1 | F53 | 0 | ||
0128 | df/dt | Integration time (number of cycles for calculation of the average df/dt) | 1 – 200 | 1 | F1 | 1 | |
0129 | Confirmations number for df/dt protection | 2 or 4 | 2 | F1 | 4 | ||
012A | Frequency | Under voltage blocking threshold (U<Blk ) for frequency elements | to 1300 or 200 to 4800 |
1 or 5 |
V/10 | F1 | 50 or 200 |
012B | du/dt | Confirmations number | 2 to 4 | 1 | F1 | 4 | |
012C | df/dt | Inhib. Block. df/dt>20 Hz/s | 0 – 1 | 1 | F24 | 0 | |
012D – 012E | Reserved | ||||||
12F | Output relays | Fail safe relays | 0 – 255 | 1 | F114 | 0 | |
0130 | Communicatio n | Baud rate | 0 to 7 | 1 | – | F4 | 6 = 19200 bauds |
0131 | Parity | 0 to 2 | 1 | – | F5 | 0 = without | |
0132 | Reserved | ||||||
0133 | Number of stop bits | 0 to 1 | 1 | – | F29 | 0 = 1 stop bit | |
0134 | Comm. available | 0 to 1 | 1 | – | F30 | 1 = COM available | |
0135 | Date Format | 0 to 1 | 1 | F33 | |||
0136 | Reserved | ||||||
0137 | Rear port address | 1 to 255 | 1 | 1 | |||
0138 – 013F | Relay description (Courier) | 32-127 | 1 | F10 | |||
0140 | Setting group | Active setting group | 1 to 2 (P922/P923) 1 (P921) | 1 | – | F1 | 1 |
0141 | Validation of instantaneous self resetting | 0 to 1 | 1 | F1 | 0 | ||
0142 | Configuration of the change of the setting group | 0 to 1 | 1 | F60 | 0 | ||
0143 | Configuration of Battery and RAM error alarms | 0 to 1 | 1 | F1 | 0 | ||
0144 | Alarms inhib | U> alarm | 0 – 1 | 1 | F24 | 0 | |
0145 | U>> alarm | 0 – 1 | 1 | F24 | 0 | ||
0146 | U>>> alarm | 0 – 1 | 1 | F24 | 0 | ||
0147 | Reserved | ||||||
0148 | Output Relays | du/dt1 | 0 – 127 | 1 | F14 | 0 | |
0149 | du/dt2 | 0 – 127 | 1 | F14 | 0 | ||
014A | du/dt3 | 0 – 127 | 1 | F14 | 0 | ||
014B | du/dt4 | 0 – 127 | 1 | F14 | 0 | ||
014C – 014F | Do not use | ||||||
0150 | Leds configuration | Led 5, part 1 | 1 | – | F19a | 0 | |
0151 | Led 6, part 1 | 1 | – | F19a | 0 | ||
0152 | Led 7, part 1 | 1 | – | F19a | 0 | ||
0153 | Led 8, part 1 | 1 | F19a | 0 | |||
0154 | Led 5, part 2 | 1 | F19b | 0 | |||
0155 | Led 6, part 2 | 1 | F19b | 0 | |||
0156 | Led 7, part 2 | 1 | F19b | 0 | |||
0157 | Led 8, part 2 | 1 | F19b | 0 | |||
0158 | Led 5, part 3 | 1 | F19c | 0 | |||
0159 | Led 6, part 3 | 1 | F19c | 0 | |||
015A | Led 7, part 3 | 1 | F19c | 0 | |||
015B | Led 8, part 3 | 1 | F19c | 0 | |||
015C | Led 5, part 4 | 1 | F19d | 0 | |||
015D | Led 6, part 4 | 1 | F19d | 0 | |||
015E | Led 7, part 4 | 1 | F19d | 0 | |||
015F | Led 8, part 4 | 1 | F19d | 0 | |||
0160 | Logic inputs configuration | Logic input 1 | VTA | – | F15a | 0 | |
0161 | Logic input 2 | VTA | – | F15a | 0 | ||
0162 | Logic input 3 (P922-P923) | VTA | – | F15a | 0 | ||
0163 | Logic input 4 (P922-P923) | VTA | – | F15a | 0 | ||
0164 | Logic input 5 (P922-P923) | VTA | – | F15a | 0 | ||
0165 | Output relays (RL2 to RL8) | df/dt1 | 0 to 127 | 1 | – | F14 | 0 |
0166 | df/d2 | 0 to 127 | 1 | – | F14 | 0 | |
0167 | df/dt3 | 0 to 127 | 1 | – | F14 | 0 | |
0168 | df/dt4 | 0 to 127 | 1 | – | F14 | 0 | |
0169 | df/dt5 | 0 to 127 | 1 | – | F14 | 0 | |
016A | df/dt6 | 0 to 127 | 1 | – | F14 | 0 | |
016B – 016F | Do not use | ||||||
0170 | Output relays (RL2 to RL8) | Trip | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 |
0171 | Closing order | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0172 | tV< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0173 | tV<< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0174 | tV<<< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0175 | tV> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0176 | tV>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0177 | tV>>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0178 | tVo> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0179 | tVo>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
017A | tVo>>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
017B | V< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
017C | V<< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
017D | V<<< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
017E | V> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
017F | V>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0180 | V>>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0181 | Vo> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0182 | Vo>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0183 | Vo>>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0184 | tAux 1 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0185 | tAux 2 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0186 | tV2> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0187 | V2>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0188 | tV1< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0189 | tV1<< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
018A | tf1 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
018B | tf2 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
018C | tf3 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
018D | tf4 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
018E | tf5 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
018F | tf6 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0190 | V2> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0191 | V2>> | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0192 | V1< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0193 | V1<< | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0194 | f1 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0195 | f2 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0196 | f3 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0197 | f4 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0198 | f5 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
0199 | f6 | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
019A | CB alarms of operations, closing time, operating time | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
019B | Frequency out of range | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
019C | CB failure | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
019D | Boolean equation A | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
019E | Boolean equation B | 0 – 7 or 0 – 127 | 1 | – | F14 | 0 | |
019F | Boolean equation C | 0 – 127 | F14 | ||||
01A0 | Boolean equation D | 0 – 127 | F14 | ||||
01A1 | Active group | 0 – 127 | F14 | ||||
01A2 – 01CC | Do not use | ||||||
01CD | Trip configuration, part 3 | 0 to 3FF or FFFF | 1 | F7b | 0 | ||
01CE | Latched functions (3) | 0 to 1FFF or 7FFF | 1 | – | F7b | 0 | |
01CF | Reserved | ||||||
01D0 | Automat. ctrl | Trip configuration, part 1 | 0 to 1FFF or 7FFF | 1 | – | F6 | 0 |
01D1 | Trip configuration, part 2 | 0 to 3FF or FFFF | F7a | 0 | |||
01D2 | Latched functions (1) | 0 to 1FFF or 7FFF | 1 | – | F6 | 0 | |
01D3 | Latched functions (2) | 0 to 3FF or FFFF | F7a | 0 | |||
01D4 | Blocking logic 1, part 1 | 0 to 1FFF | 1 | – | F8a | 0 | |
01D5 | Blocking logic 1, part 2 | 0 to 3FF or FFFF | F7a | 0 | |||
01D6 | Blocking logic 2, part 1 | 0 to 1FFF | 1 | – | F8a | 0 | |
01D7 | Blocking logic 2, part 2 | 0 to 3FF or FFFF | F7a | 0 | |||
01D8 | Do not use | ||||||
01D9 | Do not use | ||||||
01DA | Do not use | ||||||
01DB | Do not use | ||||||
01DC | Auxiliary timer 1 | 0 to 20000 | 1 | 1/100 sec | F1 | 0 | |
01DD | Auxiliary timer 2 | 0 to 20000 | 1 | 1/100 sec | F1 | 0 | |
01DE | Reserved | ||||||
01DF | Frequency disturbance record (Trigger configuration) | 0-2 | 1 | F57 | 0 | ||
01E0 | Disturbance records | Pre-time | 1 to 29 1 to 29 1 to 49 1 to 69 1 to 89 |
1 | 1/10 sec | F1 | 1 |
01E1 | Do not use | ||||||
01E2 | Disturbance record (Trigger Configuration) | 0 to 1 | 1 | – | F32 | 0 | |
01E3 | CB supervision | Number of operations | 0-1 | 1 | – | F24 | 0 |
01E4 | Max number of the CB operation | 0 – 50000 | 1 | – | F1 | 0 | |
01E5 | Supervision of the operating time | 0-1 | 1 | – | F24 | 0 | |
01E6 | Max operating time | 10 to 500 | 5 | 1/100 sec | F1 | 10 | |
01E7 | Supervision of the closing time | 0-1 | 1 | – | F24 | 0 | |
01E8 | Max closing time | 10 to 500 | 5 | 1/100 sec | F1 | 10 | |
01E9 | Time period for average/max values | 5 to 60 | VTA | min | F42 | 5 | |
01EA | Tripping pulse | 10 to 500 | 5 | 1/100 sec | F1 | 10 | |
01EB | Closing pulse | 10 to 500 | 5 | 1/100 | F1 | 10 | |
01EC | Do not use | ||||||
01ED | Do not use | ||||||
01EE | Do not use | ||||||
01EF | Do not use | ||||||
01F0 | Output Relays | Logic input 1 | 0 – 127 | 1 | F14 | 0 | |
01F1 | Logic input 2 | 0 – 127 | 1 | F14 | 0 | ||
01F2 | Logic input 3 | 0 – 127 | 1 | F14 | 0 | ||
01F3 | Logic input 4 | 0 – 127 | 1 | F14 | 0 | ||
01F4 | Logic input 5 | 0 – 127 | 1 | F14 | 0 | ||
01F5 – 01F9 | Do not use | ||||||
01FA | Alarms inhib. | du/dt1 | 0 – 1 | 1 | F24 | 0 | |
01FB | du/dt2 | 0 – 1 | 1 | F24 | 0 | ||
01FC | du/dt3 | 0 – 1 | 1 | F24 | 0 | ||
01FD | du/dt4 | 0 – 1 | 1 | F24 | 0 | ||
01FE | Reserve | ||||||
01FF | Reserve | ||||||
Undervoltage protection (P921- P922 and P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
200 | Setting group n°1 | V< configuration | 0-2 | 1 | – | F55 | 0 |
201 | Threshold | V< 50 to 1300 or 200 to 4800 |
1 or 5 | V/10 | F1 | 50 or 200 | |
202 | Type of temporisation | 0 to 1 | 1 | – | F27 | 0 | |
203 | TMS value for V< | 5 to 1000 | 5 | 1/10 | F1 | 10 | |
204 | tRESET temporisation | 0 to 10000 | 1 | 1/100 s | F1 | 10 | |
205 | V< temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
206 | Inhibition U< by 52a | 0 – 1 | 1 | F24 | 0 | ||
0207 to 020F | Reserved | 0 | |||||
210 | V<< configuration | 0-2 | 1 | – | F55 | 0 | |
211 | Threshold V<< | 50 to 1300 or 200 to 4800 |
1 or 5 |
V/10 | F1 | 50 or 200 | |
212 | V<< temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 1 | |
213 | Inhibition U<< by 52a | 0 – 1 | 1 | F24 | 0 | ||
0214 to 021F | Reserved | 0 | |||||
220 | V<<< configuration | 0-2 | 1 | – | F55 | 0 | |
221 | Threshold V<<< | 50 to 1300 or 200 to 4800 |
1 or 5 |
V/10 | F1 | 50 or 200 | |
222 | V<<< temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 1 | |
223 | Inhibition U<<< by 52a | 0 – 1 | 1 | F24 | 0 | ||
0224 to 022E | Reserved | 0 | |||||
022F | V< Hysteresis | 102 to 105 | 1 | % or 1/100 | F1 | 102 | |
Overvoltage protection (P921 -P922 and P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
230 | V> configuration | 0-2 | 1 | – | F55 | 0 | |
231 | Threshold V> | 50 to 2000 or 200 to 7200 |
1 or 5 | V/10 | F1 | 1300 or 4800 | |
232 | Type of temporisation | 0 to 1 | 1 | – | F27 | 0 | |
233 | TMS value for V> | 5 to 1000 | 5 | 1/10 | F1 | 10 | |
234 | tRESET temporisation | 0 to 10000 | 1 | 1/100 s | F1 | 1 | |
235 | V> temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
0236 to 023F | Reserved | 0 | |||||
240 | V>> configuration | 0-2 | 1 | – | F55 | 0 | |
241 | Threshold V>> | 50 to 2600 or 200 to 9600 |
1 or 5 | V/10 | F1 | 1300 or 4800 | |
242 | V>> temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 1 | |
0243 to 024F | Reserved | 0 | |||||
250 | V>>> configuration | 0-2 | 1 | – | F55 | 0 | |
251 | Threshold V>>> | 50 to 2600 or 200 to 9600 |
1 or 5 | V/10 | F1 | 1300 or 4800 | |
252 | V>>> temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 1 | |
0253 to 025E | Reserved | 0 | |||||
025F | V> Hysteresis | 95 to 98 | 1 | % or 1/100 | F1 | 98 | |
Zero sequence overvoltage protection (P921- P922 and P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
260 | Vo> configuration | 0-1 | 1 | – | F24 | 0 | |
261 | Threshold Vo> | 5 to 1300 or 20 to 4800 |
1 or 5 | V/10 | F1 | 50 or 200 | |
262 | Type of temporisation | 0 to 1 | 1 | – | F27 | 0 | |
263 | TMS value for Vo> | 5 to 1000 | 5 | 1/10 | F1 | 10 | |
264 | tRESET temporisation | 0 to 10000 | 1 | 1/100 s | F1 | 1 | |
265 | Vo> temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
0266 to 026F | Reserved | 0 | |||||
270 | Vo>> configuration | 0-1 | 1 | – | F24 | 0 | |
271 | Threshold Vo>> | 5 to 1300 or 20 to 4800 |
1 or 5 | V/10 | F1 | 50 or 200 | |
272 | Vo>> temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
0273 to 027F | Reserved | 0 | |||||
280 | Vo>>> configuration | 0-1 | 1 | – | F24 | 0 | |
281 | Threshold Vo>>> | 5 to 1300 or 20 to 4800 |
1 or 5 | V/10 | F1 | 50 or 200 | |
282 | Vo>>> temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
0283 to 028F | Reserved | 0 | |||||
Negative sequence overvoltage protection (P922- P923) and F + df/dt protection (P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
290 | V2> configuration | 0-1 | 1 | – | F24 | 0 | |
291 | Threshold V2> | 50 to 2000 or 200 to 7200 |
1 or 5 | V/10 | F1 | 1300 or 4800 | |
292 | Type of temporisation | 0 to 1 | 1 | – | F27 | 0 | |
293 | TMS value for V2> | 5 to 1000 | 5 | 1/10 | F1 | 10 | |
294 | tRESET temporisation | 0 to 10000 | 1 | 1/100 s | F1 | 1 | |
295 | V2> temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
0296 to 029F | Reserved | 0 | |||||
02A0 | V2>> configuration | 0-1 | 1 | – | F24 | 0 | |
02A1 | Threshold V2>> | 50 to 2000 or 200 to 7200 |
1 or 5 | V/10 | F1 | 1300 or 4800 | |
02A2 | V2>> temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
02A3 to 02AF | Reserved | 0 | |||||
Positive sequence undervoltage protection (P922 – P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
02B0 | V1< configuration | 0-1 | 1 | – | F24 | 0 | |
02B1 | Threshold V1< | 50 to 1300 or 200 to 4800 |
1 or 5 | V/10 | F1 | 50 or 200 | |
02B2 | Type of temporisation | 0 to 1 | 1 | – | F27 | 0 | |
02B3 | TMS value V1< | 5 to 1000 | 5 | 1/10 | F1 | 10 | |
02B4 | tRESET temporisation | 0 to 10000 | 1 | 1/100 s | F1 | 1 | |
02B5 | V1< temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
02B6 to 02BF | Reserved | 0 | |||||
02C0 | V1<< configuration | 0-1 | 1 | – | F24 | 0 | |
02C1 | Threshold V1<< | 50 to 1300 or 200 to 4800 |
1 or 5 | V/10 | F1 | 50 or 200 | |
02C2 | V1<< temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
V0 derived voltage protection (P922 – P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
02C3 | V0 derived | V0der> activation | 0 – 1 | 1 | – | F24 | 0 |
02C4 | V0der> threshold | A: 5 – 1300 B: 20 – 4800 |
1 5 |
1/10 V | F1 | A: 50 B: 200 |
|
02C5 | V0der> Delay type | 0 – 1 | 1 | F27 | 0 | ||
02C6 | TMS | 5 – 1000 | 5 | 1/10 | F1 | 10 | |
02C7 | t Reset V0der> | 0 – 10000 | 1 | 1/100 s | F1 | 1 | |
02C8 | t V0der> | 0 – 59999 | 1 | 1/100 s | F1 | 4 | |
02C9 | V0der>> activation | 0 – 1 | 1 | – | F24 | 0 | |
02CA | V0der>> threshold | A: 5 – 1300 B: 20 – 4800 |
1 5 |
1/10 V | F1 | A: 50 B: 200 |
|
02CB | t V0der>> | 0 – 59999 | 1 | 1/100 s | F1 | 4 | |
02CC | V0der>>> activation | 0 – 1 | 1 | – | F24 | 0 | |
02CD | V0der>>> threshold | A: 5 – 1300 B: 20 – 4800 |
1 5 |
1/10 V | F1 | A: 50 B: 200 |
|
02CE | t V0der>>> | 0 – 59999 | 1 | 1/100 s | F1 | 4 | |
02CF | Reserved | 0 | |||||
Under/overfrequency (P922 – P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
02D0 | f1 | 0-2 | 1 | – | F56 | 0 | |
02D1 | Threshold f1 | 4000 to 6000 if fn= 50Hz 5000 to 7000 if fn= 60Hz |
1 | 1/100 Hz | F1 | 5000 or 6000 | |
02D2 | f1 temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
02D3 | f2 | 0-2 | 1 | – | F56 | 0 | |
02D4 | Threshold f2 | 4000 to 6000 if fn= 50Hz 5000 to 7000 if fn= 60Hz |
1 | 1/100 Hz | F1 | 5000 or 6000 | |
02D5 | f2 temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
02D6 | f3 | 0-2 | 1 | – | F56 | 0 | |
02D7 | Threshold f3 | 4000 to 6000 if fn= 50Hz 5000 to 7000 if fn= 60Hz |
1 | 1/100 Hz | F1 | 5000 or 6000 | |
02D8 | f3 temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
02D9 | f4 | 0-2 | 1 | – | F56 | 0 | |
02DA | Threshold f4 | 4000 to 6000 if fn= 50Hz 5000 to 7000 if fn= 60Hz |
1 | 1/100 Hz | F1 | 5000 or 6000 | |
02DB | f4 temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
02DC | f5 | 0-2 | 1 | – | F56 | 0 | |
02DD | Threshold f5 | 4000 to 6000 if fn= 50Hz 5000 to 7000 if fn= 60Hz |
1 | 1/100 Hz | F1 | 5000 or 6000 | |
02DE | f5 temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
02DF | f6 | 0-2 | 1 | – | F56 | 0 | |
02E0 | Threshold f6 | 4000 to 6000 if fn= 50Hz 5000 to 7000 if fn= 60Hz |
1 | 1/100 Hz | F1 | 5000 or 6000 | |
02E1 | f6 temporisation | 0 to 59999 | 1 | 1/100 s | F1 | 4 | |
Rate of change of frequency ( Only MiCOM P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
02E2 | df/dt1 | 0-1 | 1 | F24 | 0 | ||
02E3 | df/dt1 threshold | -100 to 100 | 1 | 1/10 Hz/s | F2 | 10 | |
02E4 | df/dt2 | 0-1 | 1 | F24 | 0 | ||
02E5 | df/dt2 threshold | -100 to 100 | 1 | 1/10 Hz/s | F2 | 10 | |
02E6 | df/dt3 | 0-1 | 1 | F24 | 0 | ||
02E7 | df/dt3 threshold | -100 to 100 | 1 | 1/10 Hz/s | F2 | 10 | |
02E8 | df/dt4 | 0-1 | 1 | F24 | 0 | ||
02E9 | df/dt4 threshold | -100 to 100 | 1 | 1/10 Hz/s | F2 | 10 | |
02EA | df/dt5 | 0-1 | 1 | F24 | 0 | ||
02EB | df/dt5 threshold | -100 to 100 | 1 | 1/10 Hz/s | F2 | 10 | |
02EC | df/dt6 | 0-1 | 1 | F24 | 0 | ||
02ED | df/dt6 threshold | -100 to 100 | 1 | 1/10 Hz/s | F2 | 10 | |
02EE to 02EF | Reserved | ||||||
Rate of change of Voltage ( Only MiCOM P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
02F0 | du/dt1 activation | 0 – 4 | 1 | F62 | 0 | ||
02F1 | du/dt1 U threshold | +/-10 to +/-2000 or +/-40 to +/-7200 |
5 | 1/10 V | F2 | A: 100 B: 400 |
|
02F2 | du/dt1 U threshold | 10 to 1000 | 1 | 1/100 s | F1 | 100 | |
02F3 | du/dt2 activation | 0 – 4 | 1 | F62 | 0 | ||
02F4 | du/dt2 U threshold | +/-10 to +/-2000 or +/-40 to +/-7200 |
5 | 1/10 V | F2 | A: 100 B: 400 |
|
02F5 | du/dt2 U threshold | 10 to 1000 | 1 | 1/100 s | F1 | 100 | |
02F6 | du/dt3 activation | 0 – 4 | 1 | F62 | 0 | ||
02F7 | du/dt3 U threshold | +/-10 to +/-2000 or +/-40 to +/-7200 |
5 | 1/10 V | F2 | A: 100 B: 400 |
|
02F8 | du/dt3 U threshold | 10 to 1000 | 1 | 1/100 s | F1 | 100 | |
02F9 | du/dt4 activation | 0 – 4 | 1 | F62 | 0 | ||
02FA | du/dt4 U threshold | +/-10 to +/-2000 or +/-40 to +/-7200 |
5 | 1/10 V | F2 | A: 100 B: 400 |
|
02FB | du/dt4 U threshold | 10 to 1000 | 1 | 1/100 s | F1 | 100 | |
Voltage balance ( Only MiCOM P923)
Address | Group | Description | Settings range | Step | Unit | Format | Default settings |
02FC | Voltage balance | Voltage balance activation K< | 0-1 | 1 | F24 | 0 | |
02FD | Voltage balance threshold K< | 50 – 100 | 1 | 0.01 | F1 | 50 | |
02FE – 2FF | Reserved | ||||||
Hardware Configuration
Address | Group | Description | Values | Step | Unit | Format | Default | Product |
0600 | Output relays | F1 + df/dt1 | 0 – 127 | 1 | – | F14 | 0 | P923 |
0601 | F2 + df/dt2 | 0 – 127 | 1 | – | F14 | 0 | P923 | |
0602 | F3 + df/dt3 | 0 – 127 | 1 | – | F14 | 0 | P923 | |
0603 | F4 + df/dt4 | 0 – 127 | 1 | – | F14 | 0 | P923 | |
0604 | F5 + df/dt5 | 0 – 127 | 1 | – | F14 | 0 | P923 | |
0605 | F6 + df/dt6 | 0 – 127 | 1 | – | F14 | 0 | P923 | |
0606 | tAux 3 | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
0607 | tAux 4 | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
0608 | tAux 5 | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
0609 | tVTS | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
060A | V0der> | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
060B | tV0der> | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
060C | V0der>> | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
060D | tV0der>> | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
060E | V0der>>> | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
060F | tV0der>>> | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
0610 | Boolean equation E | 0 – 127 | 1 | – | F14 | 0 | P921-2-3 | |
0611 | Boolean equation F | 0 – 127 | 1 | – | F14 | 0 | P921-2-3 | |
0612 | Boolean equation G | 0 – 127 | 1 | – | F14 | 0 | P921-2-3 | |
0613 | Boolean equation H | 0 – 127 | 1 | – | F14 | 0 | P921-2-3 | |
0614 | Communicati on orders | Communication order 1 | 0 – 127 | 1 | – | F14 | 0 | P922-3 |
0615 | Communication order 2 | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
0616 | Communication order 3 | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
0617 | Communication order 4 | 0 – 127 | 1 | – | F14 | 0 | P922-3 | |
0618 | Output relays | Voltage Balance K1< | 0 – 127 | 1 | – | F14 | 0 | P923 |
0619 | Voltage Balance K2< | 0 – 127 | 1 | – | F14 | 0 | P923 | |
061A | Voltage Balance K3 | 0 – 127 | 1 | – | F14 | 0 | P923 | |
061B | Voltage Balance K< Poly | 0 – 127 | 1 | – | F14 | 0 | P923 | |
061C- 061F |
Not used | |||||||
0685 | Alarm inhibition | Voltage Balance K1< | 0 – 1 | 1 | F24 | 0 | P923 | |
0686 | Voltage Balance K2< | 0 – 1 | 1 | F24 | 0 | P923 | ||
0687 | Voltage Balance K3< | 0 – 1 | 1 | F24 | 0 | P923 | ||
0688 | Alarm inhibition | Voltage Balance Kpoly< | 0 – 1 | 1 | F24 | 0 | P923 | |
0689 – 068F | Not used | |||||||
0620 | LEDs config | LED 5 part 5 | 1 | F19e | 0 | P922-3 | ||
0621 | LED 6 part 5 | 1 | F19e | 0 | P922-3 | |||
0622 | LED 7 part 5 | 1 | F19e | 0 | P922-3 | |||
0623 | LED 8 part 5 | 1 | F19e | 0 | P922-3 | |||
0624 | LED 5 part 6 | 1 | F19f | 0 | P921-2-3 | |||
0625 | LED 6 part 6 | 1 | F19f | 0 | P921-2-3 | |||
0626 | LED 7 part 6 | 1 | F19f | 0 | P921-2-3 | |||
0627 | LED 8 part 6 | 1 | F19f | 0 | P921-2-3 | |||
0628 – 062F | Not used | |||||||
0630 | Timers values | Timer aux 3 | 0 – 20000 | 1 | 1/100 sec | F1 | 0 | P922-3 |
0631 | Timer aux 4 | 0 – 20000 | 1 | 1/100 sec | F1 | 0 | P922-3 | |
0632 | Timer aux 5 | 0 – 20000 | 1 | 1/100 sec | F1 | 0 | P922-3 | |
0633- 063F |
Not used | |||||||
0640 | Blocking logic | Blocking logic 1, part 3 | 0-FFFF | 1 | F8b | 0 | P922-3 | |
0641 | Blocking logic 2, part 3 | 0-FFFF | 1 | F8b | 0 | P922-3 | ||
0642 | Trip | Trip configuration, part 4 | 0 to FFFF | 1 | F7c | 0 | P921-2-3 | |
0643 | Latch | Latched functions (4) | 0 to FFFF | 1 | F7c | 0 | P921-2-3 | |
0644 | Disturbance records | Records number | 1 – 5 | 1 | F1 | 5 | P922-3 | |
0645 | Not used | |||||||
0646 | Communicati on IEC-103 | GI selection | 0 – 1 | 1 | F76 | 0 | P922-3 | |
0647 | Communicati on IEC-103 | Type of uploaded spontaneous events | 0 – 3 | 1 | F77 | 0 | P922-3 | |
0648 | Communicati on IEC-103 | Type of Measurements | 0 – 7 | 1 | F78 | 0 | P922-3 | |
0649 | Communicati on IEC-103 | Signal & measurement / Commands blocking |
0 – 3 | 1 | F79 | 0 | P922-3 | |
064A – 064F | Not used | |||||||
0650 | VTS | VTS activation | 0 – 1 | 1 | – | F24 | 0 | P922-3 |
0651 | VTS Temporization | 0 – 10000 | 1 | 1/100 s | F1 | 500 | P922-3 | |
0652 | Delta V0 threshold | A: 20 – 1300 B:100 – 4800 |
1 | 1/10 V | F1 | A: 150 B: 500 |
P922-3 | |
0653 | Blocked functions | 0 – FFh | 1 | F64 | 0 | P922-3 | ||
0654 | Detection mode | 1 – 3 | 1 | F65 | 1 | P922-3 | ||
0655 | Inhibition by 52a | 0 – 1 | 1 | F1 | 0 | P922-3 | ||
0656- 065F |
Not used | |||||||
0660 | Alarms inhibition | U< | 0 – 1 | 1 | F24 | 0 | P921-2-3 | |
0661 | U<< | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
0662 | U<<< | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
0663 | tAux1 | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
0664 | tAux2 | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
0665 | tAux3 | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
0666 | tAux4 | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
0667 | tAux5 | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
0668 | F1 | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
0669 | F2 | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
066A | F3 | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
066B | F4 | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
066C | F5 | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
066D | F6 | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
066E | df/dt1 | 0 – 1 | 1 | F24 | 0 | P923 | ||
066F | df/dt2 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0670 | df/dt3 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0671 | df/dt4 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0672 | df/dt5 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0673 | df/dt6 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0674 | F+df/dt1 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0675 | F+df/dt2 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0676 | F+df/dt3 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0677 | F+df/dt4 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0678 | F+df/dt5 | 0 – 1 | 1 | F24 | 0 | P923 | ||
0679 | F+df/dt6 | 0 – 1 | 1 | F24 | 0 | P923 | ||
067A | Bool. equation A | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
067B | Bool. equation B | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
067C | Bool. equation C | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
067D | Bool. equation D | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
067E | Bool. equation E | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
067F | Bool. equation F | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
0680 | Bool. equation G | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
0681 | Bool. equation H | 0 – 1 | 1 | F24 | 0 | P921-2-3 | ||
0682 | Frequency out | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
0683 | tVTS | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
0684 | Ctrl Trip | 0 – 1 | 1 | F24 | 0 | P922-3 | ||
0685 | Alarm inhibition | Voltage Balance K1< | 0 – 1 | 1 | F24 | 0 | P923 | |
0686 | Voltage Balance K2< | 0 – 1 | 1 | F24 | 0 | P923 | ||
0687 | Voltage Balance K3< | 0 – 1 | 1 | F24 | 0 | P923 | ||
0688 | Voltage Balance Kpoly< | 0 – 1 | 1 | F24 | 0 | P923 | ||
0689 | Confirmation number | 1 – 12 | 1 | F1 | 1 | P922 P923 | ||
068A – 068F | Not used | |||||||
0690 | Configuratio n | [59N] Filter activation | 0 – 1 | 1 | F24 | 0 | P922-3 | |
0691 | Logic inputs configuration | Logic input 1 | VTA | F15b | 0 | P922-3 | ||
0692 | Logic input 2 | VTA | F15b | 0 | P922-3 | |||
0693 | Logic input 3 (P922- P923) | VTA | F15b | 0 | P922-3 | |||
0694 | Logic input 4 (P922- P923) | VTA | F15b | 0 | P922-3 | |||
0695 | Logic input 5 (P922- P923) | VTA | F15b | 0 | P922-3 | |||
0696- 069F |
Not used | |||||||
06A0 | Boolean Equa. | Pick-up timer eq. A | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 |
06A2 | Drop-off timer eq. A | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06A4 | Pick-up timer eq. B | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06A6 | Drop-off timer eq. B | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06A8 | Pick-up timer eq. C | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06AA | Drop-off timer eq. C | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06AC | Pick-up timer eq. D | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06AE | Drop-off timer eq. D | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06B0 | Pick-up timer eq. E | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06B2 | Drop-off timer eq. E | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06B4 | Pick-up timer eq. F | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06B6 | Drop-off timer eq. F | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06B8 | Pick-up timer eq. G | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06BA | Drop-off timer eq. G | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06BC | Pick-up timer eq. H | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06BE | Drop-off timer eq. H | 0 – 360000 | 1 | 1/100 s | F1 | 0 | P921-2-3 | |
06C0 | F + df/dt | F1+df/dt1 activation | 0 – 1 | 1 | – | F24 | 0 | P923 |
06C1 | F2+df/dt2 activation | 0 – 1 | 1 | – | F24 | 0 | P923 | |
06C2 | F3+df/dt3 activation | 0 – 1 | 1 | – | F24 | 0 | P923 | |
06C3 | F4+df/dt4 activation | 0 – 1 | 1 | – | F24 | 0 | P923 | |
06C4 | F5+df/dt5 activation | 0 – 1 | 1 | – | F24 | 0 | P923 | |
06C5 | F6+df/dt6 activation | 0 – 1 | 1 | – | F24 | 0 | P923 | |
06C6 – 06CF | Not used | |||||||
06D0 | Communicati on orders | tComm 1 delay | 0 – 60000 | 1 | 1/100 s | F1 | 0 | P922-3 |
06D1 | Communicati on orders | tComm 2 delay | 0 – 60000 | 1 | 1/100 s | F1 | 0 | P922-3 |
06D2 | Communicati on orders | tComm 3 delay | 0 – 60000 | 1 | 1/100 s | F1 | 0 | P922-3 |
06D3 | Communicati on orders | tComm 4 delay | 0 – 60000 | 1 | 1/100 s | F1 | 0 | P922-3 |
Description of Mapping Format
Code | Description | Products | ||
P921 | P922 | P923 | ||
F1 | Unsigned integer – numerical data: 1 – 65535 | X | X | X |
F2 | Signed integer – numerical data: 32768 – 32767 | X | X | X |
F3 | not used | X | X | X |
F4 | Unsigned integer: Modbus speed | |||
0: 300 | X | X | X | |
1: 600 | X | X | X | |
2: 1200 | X | X | X | |
3: 2400 | X | X | X | |
4: 4800 | X | X | X | |
5: 9600 | X | X | X | |
6: 19200 | X | X | X | |
7: 38400 | X | X | X | |
F5 | Unsigned integer: parity 0: without 1: even 2: odd |
X | X | X |
F6 | Trip configuration and Latched functions (part 1) | |||
bit 0: tV< | X | X | X | |
bit 1: tV<< | X | X | X | |
bit 2: tV<<< | X | X | X | |
bit 3: tV> | X | X | X | |
bit 4: tV>> | X | X | X | |
bit 5: tV>>> | X | X | X | |
bit 6: tVo> | X | X | X | |
bit 7: tVo>> | X | X | X | |
bit 8: tVo>>> | X | X | X | |
bit 9: tAux1 | X | X | X | |
bit 10: tAux2 | X | X | X | |
bit 11: t Equation A | X | X | X | |
bit 12: t Equation B | X | X | X | |
bit 13: t Equation C | X | X | X | |
bit 14: t Equation D | X | X | X | |
bit 15: Reserved | X | X | X | |
F7a | Trip configuration and Latched functions (part 2) | |||
Blocking logic 1 & 2 (part 2) | ||||
bit 0: tV2> | X | X | ||
bit 1: tV2>> | X | X | ||
bit 2: tV1< | X | X | ||
bit 3: tV1<< | X | X | ||
bit 4: tf1 | X | X | ||
bit 5: tf2 | X | X | ||
bit 6: tf3 | X | X | ||
bit 7: tf4 | X | X | ||
bit 8: tf5 | X | X | ||
bit 9: tf6 | X | X | ||
bit 10: df/dt1 | X | |||
bit 11: df/dt2 | X | |||
bit 12: df/dt3 | X | |||
bit 13: df/dt4 | X | |||
bit 14: df/dt5 | X | |||
bit 15: df/dt6 | X | |||
F7b | Trip configuration and Latched functions (part 3) | |||
bit 0: DV/DT1 | X | |||
bit 1: DV/DT2 | X | |||
bit 2: DV/DT3 | X | |||
bit 3: DV/DT4 | X | |||
bit 4: F1 + df/dt1 | X | |||
bit 5: F2 + df/dt2 | X | |||
bit 6: F3 + df/dt3 | X | |||
bit 7: F4 + df/dt4 | X | |||
bit 8: F5 + df/dt5 | X | |||
bit 9: F6 + df/dt6 | X | |||
bit 10: tAux3 | X | X | ||
bit 11: tAux4 | X | X | ||
bit 12: tAux5 | X | X | ||
bit 13: tV0der> | X | X | ||
bit 14: tV0der>> | X | X | ||
bit 15: tV0der>>> | X | X | ||
F7c | Trip configuration and Latched functions (part 4) | |||
bit 0: t Equation E | X | X | X | |
bit 1: t Equation F | X | X | X | |
bit 2: t Equation G | X | X | X | |
bit 3: t Equation H | X | X | X | |
Bit 4: Voltage Balance K1< | X | |||
Bit 5: Voltage Balance K2< | X | |||
Bit 6: Voltage Balance K3< | X | |||
Bit 7: Voltage Balance K< Poly | X | |||
Bits 8 to 15: Not used | X | |||
F8a | Blocking logic (part 1) | |||
bit 0: tV< | X | X | X | |
bit 1: tV<< | X | X | X | |
bit 2: tV<<< | X | X | X | |
bit 3: tV> | X | X | X | |
bit 4: tV>> | X | X | X | |
bit 5: tV>>> | X | X | X | |
bit 6: tVo> | X | X | X | |
bit 7: tVo>> | X | X | X | |
bit 8: tVo>>> | X | X | X | |
bit 9: tAux1 | X | X | X | |
bit 10: tAux2 | X | X | X | |
bit 11: Reserved | ||||
bit 12: du/dt1 | X | |||
bit 13: du/dt2 | X | |||
bit 14: du/dt3 | X | |||
bits 15: du/dt4 | X | |||
F8b | Blocking logic (part 3) | |||
Bit 0: tAux3 | X | X | ||
Bit 1: tAux4 | X | X | ||
Bit 2: tAux5 | X | X | ||
Bit 3: tV0der> | X | X | ||
Bit 4: tV0der>> | X | X | ||
Bit 5: tV0der>>> | X | X | ||
Bits 6 to 15: Not used | ||||
F9 | Unsigned integer: Remote commands | |||
bit 0: Tripping contact delatched (RL1) | X | X | X | |
bit 1: 1 st alarm acknowledgement | X | X | X | |
bit 2: All alarms acknowledgement | X | X | X | |
bit 3: Remote tripping (to RL1) | X | X | X | |
bit 4: Remote closing (to programmed output contacts) | X | X | X | |
bit 5: Setting group change | X | X | ||
bit 6: Average and max values reset | X | X | ||
bit 7: Reserved | X | X | X | |
bit 8: Disturbance record remote start | X | X | ||
bit 9: Maintenance mode start | X | X | X | |
bit 10: Remote Command Frequency Disturbance | X | |||
bit 11: Reserved | X | X | X | |
bit 12: Manual event/fault acknowledgement mode | X | X | ||
bit 13: Remote acknowledgement of the oldest event record | X | X | ||
bit 14: Remote acknowledgement of the oldest fault record | X | X | ||
bit 15: Remote acknowledgement of the "RAM error" alarm | X | X | ||
F10 | 2 characters ASCII 32 – 127 = ASCII character 1 32 – 127 = ASCII character 2 |
X | X | X |
F11 | Reserved | X | X | X |
F12 | Logic inputs status and configuration | |||
bit 0: logic input number 1 | X | X | X | |
bit 1: logic input number 2 | X | X | X | |
bit 2: logic input number 3 | X | X | ||
bit 3: logic input number 4 | X | X | ||
bit 4: logic input number 5 | X | X | ||
bits 5 to 15: reserved | ||||
F13 | Unsigned integer: Logic output status and Fail safe mode | |||
bit 0: logic output number RL1 (tripping) | X | X | X | |
bit 1: logic output number RL2 | X | X | X | |
bit 2: logic output number RL3 | X | X | X | |
bit 3: logic output number RL4 | X | X | X | |
bit 4: logic output number RL0 (watchdog) | X | X | X | |
bit 5: logic output number RL5 | X | X | ||
bit 6: logic output number RL6 | X | X | ||
bit 7: logic output number RL7 | X | X | ||
bit 8: logic output number RL8 | X | X | ||
bits 9 to 15: reserved | ||||
F14 | Unsigned integer: logic outputs configuration (excepted RL1) | |||
bit 0: selection logic output number RL2 | X | X | X | |
bit 1: selection logic output number RL3 | X | X | X | |
bit 2: selection logic output number RL4 | X | X | X | |
bit 3: selection logic output number RL5 | X | X | ||
bit 4: selection logic output number RL6 | X | X | ||
bit 5: selection logic output number RL7 | X | X | ||
bit 6: selection logic output number RL8 | X | X | ||
F15a | Logic inputs allocation (part 1) | |||
bit 0: delatch (UNLATCH) | X | X | X | |
bit 1: 52a | X | X | X | |
bit 2: 52b | X | X | X | |
bit 3: external CB failure (CB fail) | X | X | X | |
bit 4: Aux 1 | X | X | X | |
bit 5: Aux 2 | X | X | X | |
bit 6: blocking logic 1 (BLK LG1) | X | X | X | |
bit 7: blocking logic 2 (BLK LG2) | X | X | X | |
bit 8: change of active setting group (CHANG SET) | X | X | ||
bit 9: external start of the disturbance recorder (DIST TRIG) | X | X | ||
bit 10: Aux 3 | X | X | ||
bit 11: Aux 4 | X | X | ||
bit 12: Aux 5 | X | X | ||
bit 13: Control Trip | X | X | ||
bit 14: Control Close | X | X | ||
bit 15: Time synchro | ||||
F15b | Logic inputs allocation (part 2) | |||
bit 0: Reset LEDs | X | X | X | |
bit 1: VTS | X | X | ||
bit 2: Maintenance mode active | X | X | X | |
bits 3 to 15: Not used | ||||
F16 | Unsigned integer: Information generated by the zero sequence
overvoltage function bit 0: instantaneous information (V0>) or (V0>>) or (V0>>>) bit 1 to 4: reserved bit 5: instantaneous information (V0>) or (V0>>) or (V0>>>) bit 6: time delayed information (tV0>) or (tV0>>) or (tV0>>>) bits 7 to 15: reserved |
X | X | X |
F17 | Unsigned integer: Information generated by the overvoltage
function bit 0: instantaneous information (V>) or (V>>) or (V>>>) bit 1: instantaneous information VA bit 2: instantaneous information VB bit 3: instantaneous information VC bit 4: reserved bit 5: instantaneous information (V>) or (V>>) or (V>>>) bit 6: time delayed information (V>) or (V>>) or (V>>>) bits 7 to 15: reserved |
X | X | X |
F18 | Long integer | X | X | X |
F19a | Unsigned integer: LED configuration (Part 1) Bit 0: V< Bit 1: tV< Bit 2: V<< Bit 3: tV<< Bit 4: V<<< Bit 5: tV<<< Bit 6: V> Bit 7: tV> Bit 8: V>> Bit 9: tV>> Bit 10: V>>> Bit 11: tV>>> Bit 12: Vo> Bit 13: tVo> Bit 14: Vo>> Bit 15: tVo>> |
X | X | X |
F19b | Unsigned integer: LED configuration (Part 2) | |||
Bit 0: Vo>>> | X | X | X | |
Bit 1: tVo>>> | X | X | X | |
Bit 2: taux1 | X | X | X | |
Bit 3: taux2 | X | X | X | |
Bit 4: V2> | X | X | ||
Bit 5: tV2> | X | X | ||
Bit 6: V2>> | X | X | ||
Bit 7: tV2>> | X | X | ||
Bit 8: V1< | X | X | ||
Bit 9: tV1< | X | X | ||
Bit 10: V1<< | X | X | ||
Bit 11: tV1<< | X | X | ||
Bit 12: f1 | X | X | ||
Bit 13: tf1 | X | X | ||
Bit 14: f2 | X | X | ||
Bit 15: tf2 | X | X | ||
F19c | Unsigned integer: LED configuration (Part 3) | X | X | |
Bit 0: f3 | X | X | ||
Bit 1: tf3 | X | X | ||
Bit 2: f4 | X | X | ||
Bit 3: tf4 | X | X | ||
Bit 4: f5 | X | X | ||
Bit 5: tf5 | X | X | ||
Bit 6: f6 | X | X | ||
Bit 7: tf6 | X | X | ||
Bit 8: Frequency out of range | X | X | ||
Bit 9: df/dt1 | X | |||
Bit 10: df/dt2 | X | |||
Bit 11: df/dt3 | X | |||
Bit 12: df/dt4 | X | |||
Bit 13: df/dt5 | X | |||
Bit 14: df/dt6 | X | |||
Bit 15: Not used | ||||
F19d | LEDs configuration (part 4) | |||
Bit 0: Boolean equation A | X | X | X | |
Bit 1: Boolean equation B | X | X | X | |
Bit 2: Boolean equation C | X | X | X | |
Bit 3: Boolean equation D | X | X | X | |
Bit 4: Logic input 1 | X | X | X | |
Bit 5: Logic input 2 | X | X | X | |
Bit 6: Logic input 3 | X | X | ||
Bit 7: Logic input 4 | X | X | ||
Bit 8: Logic input 5 | X | X | ||
Bit 9: du/dt 1 | X | |||
Bit 10: du/dt 2 | X | |||
Bit 11: du/dt 3 | X | |||
Bit 12: du/dt 4 | X | |||
Bit 13 to 15: Not used | ||||
F19e | Unsigned long: LEDs configuration (part 5) | |||
Bit 0: F1 + df/dt1 | X | |||
Bit 1: F2 + df/dt2 | X | |||
Bit 2: F3 + df/dt3 | X | |||
Bit 3: F4 + df/dt4 | X | |||
Bit 4: F5 + df/dt5 | X | |||
Bit 5: F6 + df/dt6 | X | |||
Bit 6: tAux3 | X | X | ||
Bit 7: tAux4 | X | X | ||
Bit 8: tAux5 | X | X | ||
Bit 9: V0der> | X | X | ||
Bit 10: tV0der> | X | X | ||
Bit 11: V0der>> | X | X | ||
Bit 12: tV0der>> | X | X | ||
Bit 13: V0der>>> | X | X | ||
Bit 14: tV0der>>> | X | X | ||
Bit 15: tVTS | X | X | ||
F19f | Unsigned long: LEDs configuration (part 6) | |||
Bit 0: Boolean equation E | X | X | X | |
Bit 1: Boolean equation F | X | X | X | |
Bit 2: Boolean equation G | X | X | X | |
Bit 3: Boolean equation H | X | X | X | |
Bit 4: Voltage Balance K1< | X | |||
Bit 5: Voltage Balance K2< | X | |||
Bit 6: Voltage Balance K3< | X | |||
Bit 7: Voltage Balance K< Poly | X | |||
Bits 8 to 15: Not used | X | |||
F20a | Logic inputs functional status (Part 1) | |||
bit 0: Blocking logic 1 (BLK LG1) | X | X | X | |
bit 1: Blocking logic 2 (BLK LG2) | X | X | X | |
bit 2: Unlatched of the output contacts (UNLATCH) | X | X | X | |
bit 3: 52a | X | X | X | |
bit 4: 52b | X | X | X | |
bit 5: CB failure (CB fail) | X | X | X | |
bit 6: Auxiliary input 1 (AUX 1) | X | X | X | |
bit 7: Auxiliary input 2 (AUX 2) | X | X | X | |
bit 8: Change of active setting group (CHANG SET) | X | X | ||
bit 9: External start of the disturbance recorder (DIST TRIG) | X | X | ||
bit 10: tAux 3 | X | X | ||
bit 11: tAux 4 | X | X | ||
bit 12: tAux 5 | X | X | ||
bit 13: Control Trip | X | X | ||
bit 14: Control Close | X | X | ||
bits15: Time synchro | X | X | ||
F20b | Logic inputs functional status (Part 2) | |||
bit 0: Reset LEDs | X | X | X | |
bit 1: VTS | X | X | ||
bit 2: Maintenance mode active | X | X | X | |
bits 3 to 15: Not used | ||||
F21 | Unsigned integer: Software version 10: version 1.A 11: version 1.B 20: version 2.A etc … |
X | X | X |
F22 | Unsigned integer: internal logic data bit 0: trip output contact latched (RL1) bit 1: reserved |
X | X | X |
F23 | Unsigned integer: Self tests results | X | X | X |
bit 0: Protection in Service | X | X | X | |
bit 1: Minor fault | X | X | X | |
bit 2: Not acknowledged event record | X | X | ||
bit 3: Time synchronisation status | X | X | ||
bit 4: Disturbance record available | X | X | ||
bit 5: Fault record available | X | X | ||
bit 6: Reserved | X | X | X | |
bit 7: Reserved | X | X | X | |
F24 | Unsigned integer: Status of the relay functions 0: Disabled 1: Enabled |
X | X | X |
F25 | 2 characters ASCII | X | X | X |
F26 | Selection of the default display | |||
1: RMS value Va or Uab | X | X | X | |
2: RMS value Vb or Ubc | X | X | X | |
3: RMS value Vc or Uca | X | X | X | |
4: RMS value V0 | X | X | X | |
5: Frequency | X | X | X | |
6: V1 | X | X | ||
7: V2 | X | X | ||
8: RMS values Va (or Uab), Vb (or Ubc), Vc (or Uca), V0 | X | X | X | |
F27 | Unsigned integer: Selection of the type of temporisation 0: DMT time delay 1: IDMT time delay |
X | X | X |
F28 | Reserved | X | X | X |
F29 | Unsigned integer: Modbus communication 0: 1 bit stop 1: 2 bits stop |
X | X | X |
F30 | Unsigned integer: Rear communication 0: Communication non available 1: Communication available |
X | X | X |
F31 | Unsigned integer: Number of disturbance records available 0: None … 25: 25 Disturbance Records available |
X | X | |
F32 | Unsigned integer: Selection of the trigger mode for the
disturbance recorder 0: Instantaneous information 1: Time delayed information |
X | X | |
F33 | Unsigned integer: type of date used by the modbus communication
0: Modbus date 1: IEC date |
X | X | X |
F34 | Unsigned integer: Latch of auxiliary output relays | X | X | X |
bit 0: selection of the auxiliary output relay no 2 | X | X | X | |
bit 1: selection of the auxiliary output relay no 3 | X | X | X | |
bit 2: selection of the auxiliary output relay no 4 | X | X | X | |
bit 3: selection of the auxiliary output relay no 5 | X | X | ||
bit 4: selection of the auxiliary output relay no 6 | X | X | ||
bit 5: selection of the auxiliary output relay no 7 | X | X | ||
bit 6: selection of the auxiliary output relay no 8 | X | X | ||
F35 | Unsigned integer: Disturbance recorder status 0: No record in progress 1: Record in progress |
X | X | |
F36 | Unsigned integer: Alarm status (1) | |||
Bit 0: V0 > | X | X | X | |
Bit 1: tV0 > | X | X | X | |
Bit 2: V0 >> | X | X | X | |
Bit 3: tV0 >> | X | X | X | |
Bit 4: V0 >>> | X | X | X | |
Bit 5: tV0 >>> | X | X | X | |
Bit 6: V2 > | X | X | ||
Bit 7: tV2 > | X | X | ||
Bit 8: V2 >> | X | X | ||
Bit 9: tV2 >> | X | X | ||
Bit 10: V1 < | X | X | ||
Bit 11: t V1 < | X | X | ||
Bit 12: V1 << | X | X | ||
Bit 13: tV1 << | X | X | ||
Bit 14: Control Trip | X | X | X | |
F37 | Unsigned integer: Alarm status (2) Bit 0: instantaneous information f1 Bit 1: time delayed information f1 Bit 2: instantaneous information f2 Bit 3: time delayed information f2 Bit 4: instantaneous information f3 Bit 5: time delayed information f3 Bit 6: instantaneous information f4 Bit 7: time delayed information f4 |
X | X | |
F37 | Bit 8: instantaneous information f5 Bit 9: time delayed information f5 Bit 10: instantaneous information f6 Bit 11: time delayed information f6 |
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F38a | Alarm status for Boolean equations and miscellaneous (Aux inputs, CB supervision, Fout), part 1 | |||
Bit 0: Boolean equation A | X | X | X | |
Bit 1: Boolean equation B | X | X | X | |
Bit 2: Boolean equation: time delayed information" | X | X | X | |
Bit 3: time delayed information "tAUX1" | X | X | X | |
Bit 4: time delayed information "tAUX2" | X | X | X | |
Bit 5: Max CB operating time reached | X | X | ||
Bit 6: Max CB operations reached | X | X | ||
Bit 7: Max CB closing time reached | X | X | ||
Bit 8: CB alarm (logic "OR" between bits 5, 6 and 7) | X | X | ||
Bit 9: Frequency out of range: fmeasured > fn+20Hz or fmeasured < fn-20Hz | X | X | ||
Bit 10: Boolean equation C | X | X | X | |
Bit 11: Boolean equation D | X | X | X | |
Bit 12: Frequency out of range due to undervoltage blocking | X | |||
Bit 13: time delayed information "tAUX3" | X | X | ||
Bit 14: time delayed information "tAUX4" | X | X | ||
Bit 15: time delayed information "tAUX5" | X | X | ||
F38b | Alarm status for Boolean equations, part 2 | |||
Bit 0: Boolean equation E | X | X | X | |
Bit 1: Boolean equation F | X | X | X | |
Bit 2: Boolean equation G | X | X | X | |
Bit 3: Boolean equation H | X | X | X | |
Bits 4 to 15: Not used | X | X | X | |
F39 | Output relays command in Maintenance
mode bit 0: RL1 (trip) bit 1: RL2 bit 2: RL3 bit 3: RL4 bit 4: RL0 (watch-dog) bit 5: RL5 bit 6: RL6 bit 7: RL7 bit 8: RL8 |
X | X | X |
F40 | Reserved | |||
F41 | Unsigned integer: Rear communication protocol (RS485) 0: Modbus RTU 1: Courier KBus 2: IEC 60870-5-103 |
X | X | X |
F42 | Unsigned integer: Time period for calculation of average/max values 5, 10, 15, 30 or 60 min | X | X | |
F45 | Unsigned integer: MiCOM relay status Bit 0: Watchdog Bit 1: Communication failure Bit 2: EEPROM data failure Bit 3: Analog failure Bit 4: Datation Bit 5: EEPROM calibration failure Bit 6: RAM memory failure Bit 7: reserve 7 Bit 8: Maintenance mode Bit 9: Default settings Bit 10: main power supply Bit 11: auxiliary power supplies Bit 12: transformers offset failure Bit 13 to 15: reserved |
X | X | X |
F46 | Unsigned integer: Remote controls 3 | |||
Bit 0: Reserved | X | X | ||
Bit 1: Reserved (R&D) | X | X | ||
Bit 2: Acknowledgement of the oldest disturbance record (manually) | X | X | X | |
Bit 3: CB operations number Reset | X | X | X | |
Bit 4: Reserved | X | X | X | |
Bit 5: Reserved | X | X | X | |
Bit 6: LEDs reset | X | X | ||
Bit 7: End of Maintenance mode | X | X | ||
Bit 8: Communication order 1 | X | X | X | |
Bit 9: Communication order 2 | X | X | X | |
Bit 10: Communication order 3 | X | X | ||
Bit 11: Communication order 4 | X | X | ||
Bit 12: Data records reset | X | X | ||
Bit 13: Reserved | X | X | ||
Bit 14: Reserved | X | X | ||
Bit 15: Reserved | X | X | ||
F47 | Unsigned integer: Information generated by the undervoltage
protection Bit 0: instantaneous information threshold phase (V<) or (V<<) or (V<<<) Bit 1: instantaneous information VA Bit 2: instantaneous information VB Bit 3: instantaneous information VC Bit 4: reserved Bit 5: instantaneous information (V<) or (V<<) or (V<<<) Bit 6: time delayed information (tV<) or (tV<<) or (tV<<<) Bits 7 to 15: reserved |
X | X | X |
F48 | Unsigned integer: Information generated by the "Negative
seq. Overvoltage" and "Positive seq. undervoltage" Bit 0: instantaneous information threshold V2> Bit 1: instantaneous information V2> Bit 2: time delayed information V2> Bit 3: instantaneous information threshold V2>> Bit 4: instantaneous information V2>> Bit 5: time delayed information V2 >> |
X | X | |
Bit 6: instantaneous information threshold
V1< Bit 7: instantaneous information V1< Bit 8: time delayed information V1< Bit 9: instantaneous information threshold V1<< Bit 10: instantaneous information V1<< Bit 11: time delayed information V1<< Bits 12 to 15 reserved |
X | X | ||
F49 | Unsigned integer: Information generated by the frequency
protection Bit 0: Frequency protection Bit 1: Instantaneous information Bit 2: Time delayed information of the frequency protection Bit 3 to Bit 15: Reserved |
X X X | X X X | |
F50 | Unsigned integer: type of the voltage applied to the logic
inputs 0: DC voltage 1: AC voltage |
X | X | X |
F51 | Unsigned long integer | X | X | X |
F52 | Unsigned integer: Voltage connection 0: Connection "3Vpn" 1: Connection "3Vpn+Vr" 2: Connection "2Upp+Vr" 3: Connection "3Upp+Vr" |
X | X | X |
F53 | Unsigned integer: Configuration of the voltage protection 0: "PROTECT P-N" = phase voltage protection 1: "PROTECT P-P" = line voltage protection |
X | X | X |
F54 | Do not use | |||
F55 | Unsigned integer: Configuration of the under/overvoltage
thresholds 0: Disabled 1: "OR" detection 2: "AND" detection |
X | X | X |
F56 | Unsigned integer: Configuration of the frequency thresholds
0: Disabled 1: Underfrequency 2: Overfrequency |
X | X | |
F57 | Unsigned integer: trigger mode of the
frequency disturbance record 0: start of a time delayed df/dt
information 1: activation of a logic equation 2: closing of the tripping relay contact ( RL1 ) |
X | ||
F58 | Unsigned integer: information generated by the rate of change of
frequency function Bit 0: df/dt1 instantaneous information Bit 1: df/dt2 instantaneous information Bit 2: df/dt3 instantaneous information Bit 3: df/dt4 instantaneous information Bit 4: df/dt5 instantaneous information Bit 5: df/dt6 instantaneous information |
X | ||
F59 | Unsigned integer: selection of the Date format 0: Private date format 1: Date Format IEC |
X | X | |
F60 | Active group changing 0: Remote control, or HMI order.(MENU) 1: On LEVEL (high or low) of a logic input. |
X | X | |
F61 | du/dt state bit 0: Reserved bit 1: Instantaneous information Ua bit 2: Instantaneous information Ub bit 3: Instantaneous information Uc bit 4: Reserved bit 5: Start bits 6 à 15: Reserved |
X | ||
F62 | du/dt activation: 0: Not activated 1: MIN OR: Logic OR on negative du/dt 2: MIN AND: Logic AND on negative du/dt 3: MAX OR: Logic OR on positive du/dt 4: MAX AND: Logic AND on positive du/dt |
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F63 | Measurements transmission enabling for IEC870-5-103
communication 0: None 1: On trip protection 2: On instantaneous protection 3: On communication order 4: On logic input order 5: No disturbance |
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F64 | VTS, Blocked functions
Bit 0: U< blocked by VTS Bit 1: U> blocked by VTS Bit 2: V0> blocked by VTS Bit 3: V1< blocked by VTS Bit 4: V2> blocked by VTS Bit 5: F blocked by VTS Bit 6: df/dt blocked by VTS Bit 7: du/dt blocked by VTS Bits 8 to 15: Reserved |
X | X | |
F65 | VTS, Detection mode Bit 0: VTS Input Bit 1: V0 Measure |
X | X | |
F66 | VTS status Bits 0 to 4: Not used Bit 5: Start Bit 6: Trip Bits 7 to 15: Not used |
X | X | |
F67 | F + df/dt status Bits 0: F1 + df/dt1 Bits 1: F2 + df/dt2 Bits 2: F3 + df/dt3 Bits 3: F4 + df/dt4 Bits 4: F5 + df/dt5 Bits 5: F6 + df/dt6 Bits 6 to 15: Not used |
X | ||
F68 | Status IEC103 Bit 0: General start Bit 1: ……………. |
|||
F69 | Not used | |||
F70 | First operator for boolean equations 0: Nothing 1: NOT |
X | X | X |
F71 | Others than first operator for boolean equations 0: OR 1: OR NOT 2: AND 3: AND NOT |
X | X | X |
F72 | Equations operands 0000h: NULL (Default) 0001h: U<, 0002h: tU< 0003h: U<<, 0004h: tU<< 0005h: U<<<, 0006h: tU<<< 0007h: U>, 0008h: tU> 0009h: U>>, 000Ah: tU>> 000Bh: U>>>, 000Ch: tU>>> 000Dh: Vo>, 000Eh: tVo> 000Fh: Vo>>, 0010h: tVo>> 0011h: Vo>>>, 0012h: tVo>>> 0013h: V2>, 0014h: tV2> 0015h: V2>>, 0016h: tV2>> 0017h: V1<, 0018h: tV1< 0019h: V1<<, 001Ah: tV1<< 001Bh: f1, 001Ch: tf1 001Dh: f2, 001Eh: tf2 001Fh: f3, 0020h: tf3 |
X | X | X |
F72 (cont’d) | 0021h: f4, 0022h: tf4, 0023h: f5, 0024h: tf5, 0025h: f6, 0026h: tf6, 0027h: tAux1, 0028h: tAux2, 0029h: tAux3, 002Ah: tAux4, 002Bh: tAux5, 002Ch: CB ALARM, 002Dh: CB FAIL, 002Eh: df/dt 1, 002Fh: df/dt 2, 0030h: df/dt 3, 0031h: df/dt 4, 0032h: df/dt 5, 0033h: df/dt 6, 0034h: Input 1, 0035h: Input 2, 0036h: Input 3, 0037h: Input 4, 0038h: Input 5, 0039h: DU/DT1, 003Ah: DU/DT2, 003Bh: DU/DT3, 003Ch: DU/DT4, 003Dh: Output of Equation A, 003Eh: Output of Equation B, 003Fh: Output of Equation C, 0040h: Output of Equation D, 0041h: Output of Equation E, 0042h: Output of Equation F, 0043h: Output of Equation G, 0044h: Output of Equation H, 0045h: tVTS, 0046h: F1+ df/dt1, 0047h: F2 + df/dt2, 0048h: F3 + df/dt3, 0049h: F4 + df/dt4, 004Ah: F5 + df/dt5, 004Bh: F6 + df/dt6, 004Ch: Frequency out, 004Dh: Vo der>, 004Eh: tVo der> , 004Fh: Vo der>>, 0050h: tVo der>> , 0051h: Vo der>>>, 0052h: tVo der>>>, 0053h: K1<, 0054h: K2<, 0055h: K3<, 0056h: K< Poly |
X | X | X |
F73 | LEDs status (bit = 1 if LED lighted) Bit 0 – Trip LED Bit 1 – Alarm LED Bit 2 – Warning LED Bit 3 – Healthy LED (always active) Bit 4 – LED 5 Bit 5 – LED 6 Bit 6 – LED 7 Bit 7 – LED 8 |
X | X | X |
F74 | Keyboard remote control Activation of only one bit at a time.
The activated bit simulates a key pressure. bit 0: CLEAR key bit 1: ALARM key bit 2: UP key bit 3: RIGHT key bit 4: ENTER key bit 5: DOWN key bit 6: LEFT key bit 7: bit 8: bit 9: bit 10: bit 11: bit 12: bit 13: bit 14: bit 15: Dialog re-init (factory test reserved) |
X | X | X |
F75 | Unsigned integer: Alarm status (3) | |||
Bit 0: V0 der > | X | X | ||
Bit 1: tV0 der > | X | X | ||
Bit 2: V0 der >> | X | X | ||
Bit 3: tV0 der >> | X | X | ||
Bit 4: V0 der >>> | X | X | ||
Bit 5: tV0 der >>> | X | X | ||
Bits 6 to 15: Not used | X | X | ||
F76 | IEC-103 protocol: GI selection (General Interrogation) 0 – Basic GI 1 – Advanced GI |
X | X | |
F77 | IEC-103 protocol: Type of uploaded spontaneous events ( 0 = transmission disabled, 1 = transmission enabled) Bit 0 – IEC Bit 1 – Private |
X | X | |
F78 | IEC-103 protocol: Type of Measurements ( 0 = transmission disabled, 1 = transmission enabled) Bit 0 – ASDU 3.4 Bit 1 – ASDU 9 Bit 2 – other ASDUs (ASDU 77) |
X | X | |
F79 | IEC-103 protocol: Signal & Measurements / Commands blocking
( 0 = unblocked, 1 = blocked) Bit 0 – Signals & measurements Bit 1 – Commands |
X | X | |
F80 to F97 | not yet defined. | |||
F98 | Auxiliary power self-test status Bit 0: -3V3 out of range Bit 1: 5V0 out of range Bit 2: 3V3 out of range Bit 3: 12V out of range Bit 4: 1V3 out of range Bit 5: 0V out of range |
X | X | X |
F99 | Transformer self-test status bit 0: transformer 1 fault bit 1: transformer 2 fault bit 2: transformer 3 fault bit 3: transformer 4 fault bit 4: transformer 5 fault bit 5: transformer 6 fault bit 6: transformer 7 fault bit 7: transformer 8 fault bit 8: transformer 9 fault |
X | X | X |