Table of Contents

ABB / Generator differential protection (GENPDIF) _ Setting & highlights _ AB2122

Table of Contents

Overview

To combine fast fault clearance, as well as sensitivity and selectivity, the “Generator differential protection” is normally the best choice for phase-to-phase generator short circuits.

For more detailed information on “Generator differential protection”, refer to ABB, Relion 670 Series manuals.

To see other supported functions, click here.


Function Identification

Function description IEC 61850
identification
IEC 60617
identification
ANSI/IEEE C37.2
device number
Generator differential protection GENPDIF Id > 87G

Signals & Setting Parameters


GENPDIF function block

GENPDIF function block

GENPDIF Input signals

GENPDIF Input signals
Name Type Default Description
I3PNCT1 GROUP SIGNAL Neutral side input1
I3PNCT2 GROUP SIGNAL Neutral side input2
I3PTCT1 GROUP SIGNAL Terminal side input1
I3PTCT2 GROUP SIGNAL Terminal side input2
BLOCK BOOLEAN 0 Block of function
BLKRES BOOLEAN 0 Block of trip command by the restrained diff. protection
BLKUNRES BOOLEAN 0 Block of trip by unrestrained "instantaneous" diff. prot.
BLKNSUNR BOOLEAN 0 Block of trip for unrestr. neg. seq. differential feature
BLKNSSEN BOOLEAN 0 Block of trip for sensitive neg. seq. differential feature
DESENSIT BOOLEAN 0 Raise pick up: function temporarily desensitized

GENPDIF Output signals

GENPDIF Output signals
Name Type Description
TRIP BOOLEAN General, common trip signal
TRIPRES BOOLEAN Trip signal from restrained differential protection
TRIPUNRE BOOLEAN Trip signal from unrestrained differential protection
TRNSUNR BOOLEAN Trip signal from unrestr. neg. seq. diff. protection
TRNSSENS BOOLEAN Trip signal from sensitive neg. seq. diff. protection
START BOOLEAN Common start signal from any phase
STL1 BOOLEAN Start signal from phase L1
STL2 BOOLEAN Start signal from phase L2
STL3 BOOLEAN Start signal from phase L3
BLKH BOOLEAN Common harmonic block signal
OPENCT BOOLEAN An open CT was detected
OPENCTAL BOOLEAN Open CT Alarm output signal. Issued after a delay …
IDL1 REAL Instantaneous differential current L1; in primary Amperes
IDL2 REAL Instantaneous differential current L2; in primary Amperes
IDL3 REAL Instantaneous differential current L3; in primary Amperes
IDNSMAG REAL Negative Sequence Differential current; in primary Amperes
IBIAS REAL Magnitude of the common Bias current; in primary Amperes
IDDCL1 REAL DC component of diff. current, phase L1; primary Amperes
IDDCL2 REAL DC component of diff. current, phase L2; primary Amperes
IDDCL3 REAL DC component of Diff. current, phase L3; primary Amperes

GENPDIF Non group settings (basic)

GENPDIF Non group settings (basic)
Name Values (Range) Unit Step Default Description
InvertCT2Curr No
Yes
No Invert CT 2 curr., yes (1) or no (0). Default is no (0).
GlobalBaseSel 1 – 12 1 1 Selection of one of the Global Base Value groups

GENPDIF Group settings (basic)

GENPDIF Group settings (basic)
Name Values (Range) Unit Step Default Description
Operation Off
On
Off Operation Off / On
IdMin 0.05 – 1.00 IB 0.01 0.25 Section 1 sensitivity, multiple of generator rated current
IdUnre 1.00 – 50.00 IB 0.01 10.00 Unrestr. prot. limit, multiple of generator rated current
OpNegSeqDiff Off
On
On Negative Sequence Differential Enable Off/On
IMinNegSeq 0.02 – 0.20 IB 0.01 0.04 Neg. sequence curr. limit, as multiple of gen. rated curr.

GENPDIF Group settings (advanced)

GENPDIF Group settings (advanced)
Name Values (Range) Unit Step Default Description
EndSection1 0.20 – 1.50 IB 0.01 1.25 End of section 1, multiple of generator rated current
EndSection2 1.00 – 10.00 IB 0.01 3.00 End of section 2, multiple of generator rated current
SlopeSection2 10.0 – 50.0 % 0.1 40.0 Slope in section 2 of operate-restrain characteristic, in %
SlopeSection3 30.0 – 100.0 % 0.1 80.0 Slope in section 3 of operate-restrain characteristic, in %
OpCrossBlock Off
On
On Operation On / Off for cross-block logic between phases
NegSeqROA 30.0 – 120.0 Deg 0.1 60.0 Operate Angle of int/ext neg. seq. fault discriminator, deg
HarmDistLimit 5.0 – 100.0 % 0.1 10.0 (Total) relative harmonic distorsion limit, percent
TempIdMin 1.0 – 5.0 IdMin 0.1 2.0 Temp. Id pickup when input raisePickUp=1, multiple of IdMin
AddTripDelay 0.000 – 60.000 s 0.001 0.100 Additional trip delay, when input raisePickUp=1
OperDCBiasing Off
On
Off Operation DC biasing On / Off
OpenCTEnable Off
On
Off Open CT detection feature Off/On
tOCTAlarmDelay 0.100 – 10.000 s 0.001 1.000 Open CT: time to alarm if an open CT is detected, in sec
tOCTResetDelay 0.100 – 10.000 s 0.001 0.250 Reset delay in s. After delay, diff. function is activated
tOCTUnrstDelay 0.100 – 100.000 s 0.001 10.000 Unrestrained diff. protection blocked after this delay, in s

GENPDIF Monitored data

GENPDIF Monitored data
Name Type Values (Range) Unit Description
IDL1MAG REAL A Fund. freq. differential current, phase L1; in primary A
IDL2MAG REAL A Fund. freq. differential current, phase L2; in primary A
IDL3MAG REAL A Fund. freq. differential current, phase L3; in primary A
IDNSMAG REAL A Negative Sequence Differential current; in primary Amperes
IBIAS REAL A Magnitude of the common Bias current; in primary Amperes

Logics & highlights


Position of current transformers; the recommended (default) orientation

Position of current transformers; the recommended (default) orientation

Fundamental frequency differential & bias currents

Fundamental frequency differential currents

Internal fault

Internal fault

External fault

External fault

Operate-restrain characteristic

Operate-restrain characteristic

NegSeqROA determines the boundary between the internal and external fault regions

NegSeqROA determines the boundary between the internal and external fault regions

Simplified principle design of the Generator differential protection GENPDIF

Simplified principle design of the Generator differential protection GENPDIF

Generator differential logic diagram 1

Generator differential logic diagram 1

Generator differential logic diagram 2

Generator differential logic diagram 2

Generator differential logic diagram 3

Generator differential logic diagram 3

Generator differential logic diagram 4


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