Overview
The “Circuit breaker restrike protection” function monitors the circuit breaker against restriking, for example, caused by an overvoltage over the circuit breaker poles after switching off a capacitor bank, and generates a backup operate signal in case of a circuit-breaker restriking.
For more detailed information on “Circuit breaker restrike protection” function, refer to SIPROTEC 5 devices, V8.30 & higher manuals.
To see other supported functions, click here.
Structure/Embedding of the Function
Logic Overview of the Function
Setting Parameters
Setting parameters for Circuit breaker restrike protection
| Addr. | Parameter | C | Setting Options | Default Setting |
| Restrike prt.# | ||||
| _:1 | Restrike prt.#:Mode | off on test |
off | |
| _:101 | Restrike prt.#:Plausibility via 50BF fct. | no yes |
no | |
| _:102 | Restrike prt.#:Plaus. via open/trip cmd | no yes |
no | |
| _:103 | Restrike prt.#:Plaus. via binary input | no yes |
no | |
| _:106 | Restrike prt.#:Retrip after T1 | no start T2 after T1 parallel start T2, T1 |
start T2 after T1 | |
| _:104 | Restrike prt.#:Monitoring duration | 1.00 s to 600.00 s | 200.00 s | |
| _:105 | Restrike prt.#:Position recognition delay | 0.00 s to 60.00 s | 0.02 s | |
| _:3 | Restrike prt.#:Threshold | 1 A @ 100 Irated | 0.030 A to 35.000 A | 0.250 A |
| 5 A @ 100 Irated | 0.15 A to 175.00 A | 1.25 A | ||
| 1 A @ 50 Irated | 0.030 A to 35.000 A | 0.250 A | ||
| 5 A @ 50 Irated | 0.15 A to 175.00 A | 1.25 A | ||
| 1 A @ 1.6 Irated | 0.001 A to 1.600 A | 0.250 A | ||
| 5 A @ 1.6 Irated | 0.005 A to 8.000 A | 1.250 A | ||
| _:7 | Restrike prt.#:Dropout delay | 0.00 s to 60.00 s | 0.05 s | |
| _:107 | Restrike prt.#:Delay T1 for 3-pole retrip | 0.00 s to 60.00 s | 0.00 s | |
| _:108 | Restrike prt.#:Delay T2 for 3-pole trip | 0.05 s to 60.00 s | 0.15 s | |
| _:109 | Restrike prt.#:Minimum operate time | 0.00 s to 60.00 s | 0.15 s | |
Logic Diagrams & highlights
Logic Diagram for the Plausibility Release of the Circuit-Breaker Restrike Protection
Logic Diagram for Start/Stop Monitoring of the Circuit-Breaker Restrike Protection
Logic Diagram for Measuring Value, Pickup/Dropout of the Circuit-Breaker Restrike Protection
Logic Diagram for Delay/Tripping of the Circuit-Breaker Restrike Protection
